~ingle transistor with a monolithic bias network consisting of two rel mm, a cries base resistor and a base—emitter 1' "tot. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. Fealu res - s and NSV Prefix for Automotive and Other Applications Requiring Unique Site and Comm] Change Requirements; ABC 0101 Qualified and PPAP Capable - Simplifies Circuit Design - Reduces Board Space - Reduces Component Count I These Devices are Pb—Free, Halogen FrCC/BFR Free and are ROHS Compliant MAXIMUM RATINGS l'rA : 25°C, common for Ql and 02, unless otherwise noted. Rating Symbol Max Unlt Collector-Ease Voltage v9.30 50 Vdc Collector—Emitter Voltage VCEQ 50 Vdc Collector Current — Continuous lc too iiiAoe lnput Forward Voltage VWM) 30 Vdc lnput Reverse Voltage vwim) s Vdc Stresses exceedlng Maxtmum Ratings may damage the device Maxtmum Ratings are stress ratings only Functional operation above the Recommended Operating Conditions is not imleed. Extended exposure to stresses above the Recommended Operating Conditions may attect oevioe reliability. ORDERING INFORMATION nevlce Package Shlpplng' MUN5216DWIT1G. SOT-363 3,000 /Tape a Reel Sthszlsnme NSBClAaTDXVSTl G SOT-563 4,000 /Tape a Reel NSBCMSTDXVGTSG SOT-563 5,000 /Tape a Reel lFor intorrnation on tape and reel spelelcatlons, including pan orientation and tape sizes. please reter to our Tape and Reel Packaging Specifications Brochure, BRDsml/D. n Semlcunduclmcampcneuls industries. etc. 2m2 1 September. 2012 — Rev. 0 0N Sem et'tntluetot'® MARKING DI I'II'II'I o LILILI o t_tt_tt_t 7F M SpectI Date 5 Pb- l=r (Note Microdot may be ~Date Code orientation m upon manutactnnng loca Pu
© Semiconductor Components Industries, LLC, 2012
September, 2012 Rev. 0
1Publication Order Number:
DTC143TD/D
MUN5216DW1,
NSBC143TDXV6
Dual NPN Bias Resistor
Transistors
R1 = 4.7 kW, R2 = 8 kW
NPN Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
baseemitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(TA = 25°C, common for Q1 and Q2, unless otherwise noted)
Rating Symbol Max Unit
CollectorBase Voltage VCBO 50 Vdc
CollectorEmitter Voltage VCEO 50 Vdc
Collector Current Continuous IC100 mAdc
Input Forward Voltage VIN(fwd) 30 Vdc
Input Reverse Voltage VIN(rev) 6 Vdc
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
Device Package Shipping
MUN5216DW1T1G,
SMUN5216DW1T1G
SOT363 3,000 / Tape & Reel
NSBC143TDXV6T1G SOT563 4,000 / Tape & Reel
NSBC143TDXV6T5G SOT563 8,000 / Tape & Reel
For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
http://onsemi.com
MARKING DIAGRAMS
7F = Specific Device Code
M = Date Code*
G=PbFree Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
SOT363
CASE 419B
SOT563
CASE 463A
PIN CONNECTIONS
(3) (2) (1)
Q1
Q2
R1R2
R1
R2
(4) (5) (6)
7F M G
G
1
7F M G
G
1
6
MUN5216DW1, NSBC143TDXV6
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2
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
MUN5216DW1 (SOT363) One Junction Heated
Total Device Dissipation
TA = 25°C (Note 1)
(Note 2)
Derate above 25°C (Note 1)
(Note 2)
PD187
256
1.5
2.0
mW
mW/°C
Thermal Resistance, (Note 1)
Junction to Ambient (Note 2)
RqJA 670
490
°C/W
MUN5216DW1 (SOT363) Both Junction Heated (Note 3)
Total Device Dissipation
TA = 25°C (Note 1)
(Note 2)
Derate above 25°C (Note 1)
(Note 2)
PD250
385
2.0
3.0
mW
mW/°C
Thermal Resistance, (Note 1)
Junction to Ambient (Note 2)
RqJA 493
325
°C/W
Thermal Resistance, (Note 1)
Junction to Lead (Note 2)
RqJL 188
208
°C/W
Junction and Storage Temperature Range TJ, Tstg 55 to +150 °C
NSBC143TDXV6 (SOT563) One Junction Heated
Total Device Dissipation
TA = 25°C (Note 1)
Derate above 25°C (Note 1)
PD357
2.9
mW
mW/°C
Thermal Resistance,
Junction to Ambient (Note 1)
RqJA 350
°C/W
NSBC143TDXV6 (SOT563) Both Junction Heated (Note 3)
Total Device Dissipation
TA = 25°C (Note 1)
Derate above 25°C (Note 1)
PD500
4.0
mW
mW/°C
Thermal Resistance,
Junction to Ambient (Note 1)
RqJA 250
°C/W
Junction and Storage Temperature Range TJ, Tstg 55 to +150 °C
1. FR4 @ Minimum Pad.
2. FR4 @ 1.0 x 1.0 Inch Pad.
3. Both junction heated values assume total power is sum of two equally powered channels.
MUN5216DW1, NSBC143TDXV6
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3
ELECTRICAL CHARACTERISTICS (TA = 25°C, common for Q1 and Q2, unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
CollectorBase Cutoff Current
(VCB = 50 V, IE = 0)
ICBO
100
nAdc
CollectorEmitter Cutoff Current
(VCE = 50 V, IB = 0)
ICEO
500
nAdc
EmitterBase Cutoff Current
(VEB = 6.0 V, IC = 0)
IEBO
1.9
mAdc
CollectorBase Breakdown Voltage
(IC = 10 mA, IE = 0)
V(BR)CBO 50 − −
Vdc
CollectorEmitter Breakdown Voltage (Note 4)
(IC = 2.0 mA, IB = 0)
V(BR)CEO 50 − −
Vdc
ON CHARACTERISTICS
DC Current Gain (Note 4)
(IC = 5.0 mA, VCE = 10 V)
hFE 160 350
CollectorEmitter Saturation Voltage (Note 4)
(IC = 10 mA, IB = 1.0 mA)
VCE(sat)
0.25
Vdc
Input Voltage (off)
(VCE = 5.0 V, IC = 100 mA)
Vi(off)
0.6
Vdc
Input Voltage (on)
(VCE = 0.2 V, IC = 10 mA)
Vi(on)
0.9
Vdc
Output Voltage (on)
(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
VOL
0.2
Vdc
Output Voltage (off)
(VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kW)
VOH 4.9 − −
Vdc
Input Resistor R1 3.3 4.7 6.1 kW
Resistor Ratio R1/R2−−−
4. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle 2%.
Figure 1. Derating Curve
AMBIENT TEMPERATURE (°C)
12510075502502550
0
50
100
150
200
250
400
PD, POWER DISSIPATION (mW)
150
(1) (2)
(1) SOT363; 1.0 x 1.0 inch Pad
(2) SOT563; Minimum Pad
350
300
MUN5216DW1, NSBC143TDXV6
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4
TYPICAL CHARACTERISTICS
MUN5216DW1, NSBC143TDXV6
Figure 2. VCE(sat) vs. ICFigure 3. DC Current Gain
IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)
403020 50100
0.01
0.1
1
100101
1
10
100
1000
Figure 4. Output Capacitance Figure 5. Output Current vs. Input Voltage
VR, REVERSE VOLTAGE (V) Vin, INPUT VOLTAGE (V)
50403020100
0
0.4
0.8
1.2
1.6
2.0
3.2
43210
0.1
1
10
100
Figure 6. Input Voltage vs. Output Current
IC, COLLECTOR CURRENT (mA)
4030 5020100
0.1
1
10
100
VCE(sat), COLLECTOREMITTER
VOLTAGE (V)
hFE, DC CURRENT GAIN
Cob, OUTPUT CAPACITANCE (pF)
IC, COLLECTOR CURRENT (mA)
Vin, INPUT VOLTAGE (V)
IC/IB = 10
150°C
55°C
25°C
VCE = 10 V
150°C
55°C
25°C
f = 10 kHz
IE = 0 A
TA = 25°C
VO = 5 V
150°C
55°C
25°C
VO = 0.2 V
150°C
55°C
25°C
0.01
2.4
2.8
mu m A: a mu om U30 com com; umz c mu om U25 cum cams Hum n mm mm no mm: 0075 was n 4403 (m3;
MUN5216DW1, NSBC143TDXV6
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5
PACKAGE DIMENSIONS
SC88/SC706/SOT363
CASE 419B02
ISSUE W
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419B01 OBSOLETE, NEW STANDARD 419B02.
E0.2 (0.008) MM
123
D
e
A1
A
A3
C
L
654
E
b6 PL
DIM MIN NOM MAX
MILLIMETERS
A0.80 0.95 1.10
A1 0.00 0.05 0.10
A3
b0.10 0.21 0.30
C0.10 0.14 0.25
D1.80 2.00 2.20
0.031 0.037 0.043
0.000 0.002 0.004
0.004 0.008 0.012
0.004 0.005 0.010
0.070 0.078 0.086
MIN NOM MAX
INCHES
0.20 REF 0.008 REF
HE
HE
E1.15 1.25 1.35
e0.65 BSC
L0.10 0.20 0.30
2.00 2.10 2.20
0.045 0.049 0.053
0.026 BSC
0.004 0.008 0.012
0.078 0.082 0.086
ǒmm
inchesǓ
SCALE 20:1
0.65
0.025
0.65
0.025
0.50
0.0197
0.40
0.0157
1.9
0.0748
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
SC88/SC706/SOT363
|_| +1 1+ b an Iowa: u iL p \ 777+ 7 + ~+77 mchez L and J and
MUN5216DW1, NSBC143TDXV6
http://onsemi.com
6
PACKAGE DIMENSIONS
HE
DIM MIN NOM MAX
MILLIMETERS
A0.50 0.55 0.60
b0.17 0.22 0.27
C
D1.50 1.60 1.70
E1.10 1.20 1.30
e0.5 BSC
L0.10 0.20 0.30
1.50 1.60 1.70
0.020 0.021 0.023
0.007 0.009 0.011
0.059 0.062 0.066
0.043 0.047 0.051
0.02 BSC
0.004 0.008 0.012
0.059 0.062 0.066
MIN NOM MAX
INCHES
SOT563, 6 LEAD
CASE 463A
ISSUE F
eM
0.08 (0.003) X
b6 5 PL
A
C
X
Y
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
D
E
Y
12 3
45
L
6
1.35
0.0531
0.5
0.0197
ǒmm
inchesǓ
SCALE 20:1
0.5
0.0197
1.0
0.0394
0.45
0.0177
0.3
0.0118
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
HE
0.08 0.12 0.18 0.003 0.005 0.007
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DTC143TD/D
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