e and SYMBOL PARAMETER MAX. UNIT
gic level ower
T2 techno ogy VD5 Continuous drain ce voltage 50 V
surface mount |D Continuous drain nt 8 A
PD Total power diss 40 W
T‘ Continuous junc mperature 150 'C
RDSION, Drainrsource one esistance 100 m9
ch lor driving IiSL Input supply curr ViS : 5 V 650 pA
.
.
.
.
s and other
- OS output stage
- miting ‘ @ DRAIN
- protection
- perature protection
- n latched reset by input
- compatible input level
- f output stage and V I
overload protection MP Ki POWER
erived lrom input INPUT ,7
- ating input current MOSFET
irect drive by @
ntroIler i r7
- ection on all pins LO
- age clamping for turn
uctive loads PRO J E
@ SOURCE
Fig.1. PFET.
PIN DESC TION , D
1 input T , \
2 drain ‘
3 source 1 \
tab drain U
Philips Semiconductors Product specification
Logic level TOPFET BUK138-50DL
D-PAK version of BUK117-50DL
DESCRIPTION QUICK REFERENCE DATA
Monolithic temperature and SYMBOL PARAMETER MAX. UNIT
overload protected logic level power
MOSFET in TOPFET2 technology VDS Continuous drain source voltage 50 V
assembled in a 3 pin surface mount IDContinuous drain current 8 A
plastic package. PDTotal power dissipation 40 W
TjContinuous junction temperature 150 ˚C
APPLICATIONS RDS(ON) Drain-source on-state resistance 100 mΩ
General purpose switch for driving IISL Input supply current VIS = 5 V 650 µA
lamps
motors
solenoids
heaters
in automotive systems and other
applications.
FEATURES FUNCTIONAL BLOCK DIAGRAM
TrenchMOS output stage
Current limiting
Overload protection
Overtemperature protection
Protection latched reset by input
5 V logic compatible input level
Control of output stage and
supply of overload protection
circuits derived from input
Low operating input current
permits direct drive by
micro-controller
ESD protection on all pins
Overvoltage clamping for turn
off of inductive loads
Fig.1. Elements of the TOPFET.
PINNING - SOT428 PIN CONFIGURATION SYMBOL
PIN DESCRIPTION
1 input
2 drain
3 source
tab drain
DRAIN
SOURCE
INPUT RIG
LOGIC AND
PROTECTION
O / V
CLAMP POWER
MOSFET
1
2
3
tab
P
D
S
I
TOPFET
May 2001 1 Rev 1.300
SYMBOL PAR C
VD5 Continuous dra e voltage‘ , , 50 V
|D Continuous dra t v.5 : 5 V; Tm:25 ‘C , self , A
iimiied
|D Continuous dra t v.5 : 5 V; Tm: 110 ‘C , 8 A
I. Continuous inp t , 75 5 mA
Im Nonrrepetitive ut current tv 3 1 ms .10 10 mA
PD Totai power di Tm S 25 ‘C , 40 W
Tslg Storage tempe , 755 175 'C
T‘ Continuous jun perature2 normal operation , 150 'C
Tsum Case tempera during soidering , 260 'C
SYM L P C
VC Ele Hu
voi :
SYMB L P C
lndu IDM :
EDSM Non Tm S 100 mJ
EDRM Rep Tm S 20 mJ
SYM L P R
VD5 D 4
SYMBOL P C T M X. U
Ther
Fimmb Juno , , 2.5 3.1 K/W
Rmm Juno minim , 71.4 K/W
Philips Semiconductors Product specification
Logic level TOPFET BUK138-50DL
D-PAK version of BUK117-50DL
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDS Continuous drain source voltage1- - 50 V
IDContinuous drain current VIS = 5 V; Tmb = 25 ˚C - self - A
limited
IDContinuous drain current VIS = 5 V; Tmb ≤ 110 ˚C - 8 A
IIContinuous input current - -5 5 mA
IIRM Non-repetitive peak input current tp ≤ 1 ms -10 10 mA
PDTotal power dissipation Tmb ≤ 25 ˚C - 40 W
Tstg Storage temperature - -55 175 ˚C
TjContinuous junction temperature2normal operation - 150 ˚C
Tsold Case temperature during soldering - 260 ˚C
ESD LIMITING VALUE
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCElectrostatic discharge capacitor Human body model; - 2 kV
voltage C = 250 pF; R = 1.5 kΩ
OVERVOLTAGE CLAMPING LIMITING VALUES
At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Inductive load turn-off IDM = 8 A; VDD ≤ 20 V
EDSM Non-repetitive clamping energy Tmb ≤ 25 ˚C - 100 mJ
EDRM Repetitive clamping energy Tmb ≤ 95 ˚C; f = 250 Hz - 20 mJ
OVERLOAD PROTECTION LIMITING VALUE
With an adequate protection supply provided via the input pin, TOPFET can protect itself from two types of overload
- overtemperature and short circuit load.
SYMBOL PARAMETER REQUIRED CONDITION MIN. MAX. UNIT
VDS Drain source voltage34 V ≤ VIS ≤ 5.5 V 0 35 V
THERMAL CHARACTERISTIC
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Thermal resistance
Rth j-mb Junction to mounting base - - 2.5 3.1 K/W
Rth j-a Junction to ambient minimum footprint FR4 PCB - 71.4 - K/W
1 Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy.
2 A higher Tj is allowed as an overload condition but at the threshold Tj(TO) the over temperature trip operates to protect the switch.
3 All control logic and protection functions are disabled during conduction of the source drain diode.
May 2001 2 Rev 1.300
SYMBOL PARAM C M N. T P. MAX. U T
Off-state v‘S : 0 V
Vmuss Drainrsou voltage ID = 10 m 50 V
IDM : 1 A .01 50 60 70 v
|DSS Drain sou urrent vD5 : 40 , , 100 pA
: 25 'C , 0.1 10 uA
On-state IDM : 3 A 01
Rmom Drainrso VS 2 4.4 , , 190 m9
= 25 'C , 68 100 m9
VS 2 4 V , , 200 m9
= 25 'C , 72 105 m!)
s :
SYMBOL PAR C M T P. M U T
Shor vD5 _
ID Drain V‘s : 25'C s 12 16 A
4.4 V 6 , 18 A
4 V S 5 18 A
Ove V‘S _ 5'C
Pmm Ove devi 20 55 80 W
TDSC Cha whiz: 200 350 600 us
Ove on
Turn» Thre 150 170 'C
temp
Philips Semiconductors Product specification
Logic level TOPFET BUK138-50DL
D-PAK version of BUK117-50DL
OUTPUT CHARACTERISTICS
Limits are for -40˚C ≤ Tmb ≤ 150˚C; typicals are for Tmb = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Off-state VIS = 0 V
V(CL)DSS Drain-source clamping voltage ID = 10 mA 50 - - V
IDM = 1 A; tp ≤ 300 µs; δ ≤ 0.01 50 60 70 V
IDSS Drain source leakage current VDS = 40 V - - 100 µA
Tmb = 25 ˚C - 0.1 10 µA
On-state IDM = 3 A; tp ≤ 300 µs; δ ≤ 0.01
RDS(ON) Drain-source resistance VIS ≥ 4.4 V - - 190 mΩ
Tmb = 25 ˚C - 68 100 mΩ
VIS ≥ 4 V - - 200 mΩ
Tmb = 25 ˚C - 72 105 mΩ
OVERLOAD CHARACTERISTICS
-40˚C ≤ Tmb ≤ 150˚C unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Short circuit load VDS = 13 V
IDDrain current limiting VIS = 5 V; Tmb = 25˚C 8 12 16 A
4.4 V ≤ VIS ≤ 5.5 V 6 - 18 A
4 V ≤ VIS ≤ 5.5 V 5 - 18 A
Overload protection VIS = 5 V; Tmb = 25˚C
PD(TO) Overload power threshold device trips if PD > PD(TO) 20 55 80 W
TDSC Characteristic time which determines trip time1200 350 600 µs
Overtemperature protection
Tj(TO) Threshold junction 150 170 - ˚C
temperature2
1 Trip time td sc varies with overload dissipation PD according to the formula td sc ≈ TDSC / ln[ PD / PD(TO) ].
2 This is independent of the dV/dt of input voltage VIS.
May 2001 3 Rev 1.300
SYMBOL PARAME C MN. T P. MAX. U T
VWO) Input threshold voItage VD5 = 5 V; |D : 1 mA 0.6 . 2.4 V
Tmb:25'C 1.1 1.6 2.1 v
I1S Input supply current normal operatIon; V‘S : 5 V 100 220 400 pA
v15 : 4 v 80 195 330 [LA
I1SL Input supply current protection Iatched; V‘S : 5 V 200 400 650 pA
v15 : 3 v 130 250 430 [LA
V1SR Protection reset voltage‘ reset time t, 2 100 us 1.5 2 2.9 V
t, Latch reset tIme V‘s‘ : 5 V, V152 < 1="" v="" 10="" 40="" 100="" ps="" vtcuts="" input="" damping="" voltage="" ii="1.5" ma="" 5.5="" .="" 8.5="" v="" rig="" input="" series="" resistance2="" tm="" :="" 25'c="" .="" 33="" .="" kg="" to="" gate="" of="" power="" mosfet="" symbol="" in="" an="">Philips Semiconductors Product specification
Logic level TOPFET BUK138-50DL
D-PAK version of BUK117-50DL
INPUT CHARACTERISTICS
The supply for the logic and overload protection is taken from the input.
Limits are for -40˚C ≤ Tmb ≤ 150˚C; typicals are for Tmb = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VIS(TO) Input threshold voltage VDS = 5 V; ID = 1 mA 0.6 - 2.4 V
Tmb = 25˚C 1.1 1.6 2.1 V
IIS Input supply current normal operation; VIS = 5 V 100 220 400 µA
VIS = 4 V 80 195 330 µA
IISL Input supply current protection latched; VIS = 5 V 200 400 650 µA
VIS = 3 V 130 250 430 µA
VISR Protection reset voltage1reset time tr ≥ 100 µs 1.5 2 2.9 V
tlr Latch reset time VIS1 = 5 V, VIS2 < 1 V 10 40 100 µs
V(CL)IS Input clamping voltage II = 1.5 mA 5.5 - 8.5 V
RIG Input series resistance2Tmb = 25˚C - 33 - kΩ
to gate of power MOSFET
SWITCHING CHARACTERISTICS
Tmb = 25 ˚C; VDD = 13 V; resistive load RL = 4 Ω. Refer to waveform figure and test circuit.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
td on Turn-on delay time VIS = 5 V - 10 20 µs
trRise time - 20 40 µs
td off Turn-off delay time VIS = 0 V - 30 60 µs
tfFall time - 20 40 µs
1 The input voltage below which the overload protection circuits will be reset.
2 Not directly measureable from device terminals.
May 2001 4 Rev 1.300
Plastic single-ended surlace mounled package (Philips version ol D-PAK); 3 leads
(one lead cropped) somza
sealmg plane
\
He
e .le e
M
\
mnunllng
‘ base
* l
l
u m mm
W
eeele
DIMENSIONS lnnn me me aviglnnl dimenslnlu)
A hi D D1 E El NE L
A W A h I y
“N" mix. ‘ 2 b mix. 2 a mix. max, max, MIA, 9 :1 max, L mm. L: w max,
mm an ass nas one H 535 04 522 ml 573 mm 295 07
222 U65 D7‘ 07‘ us 525 02 598 605 547 on 2235 457 95 255 D5 05 Hz 02
Mme
l Measured 4mm heelene m la lead
mamas
oumME gunman
VERSION IEC JEDEC EIAJ anzcnow '55“‘°‘"‘
$01423 EL© eemm
Fig.2. SOT428 surlace mount/fig package‘, centre pin connected to mounting base.
Philips Semiconductors Product specification
Logic level TOPFET BUK138-50DL
D-PAK version of BUK117-50DL
MECHANICAL DATA
Fig.2. SOT428 surface mounting package1, centre pin connected to mounting base.
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
SOT428 98-04-07
0 10 20 mm
scale
Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads
(one lead cropped) SOT428
E
b2D1
wAM
bc
b1
L1
L
13
2
D
E1
HE
L2
Note
1. Measured from heatsink back to lead.
e1
e
AA2
A
A1
y
seating plane
mounting
base
A1(1) D
max.
bD1
max.
E
max.
HE
max. wy
max.
A2b2
b1
max. cE1
min. ee
1L1
min. L2
L
A
max.
UNIT
DIMENSIONS (mm are the original dimensions)
0.2 0.2
mm 2.38
2.22 0.65
0.45 0.89
0.71
0.89
0.71 1.1
0.9 5.36
5.26 0.4
0.2 6.22
5.98 4.81
4.45 2.285 4.57 10.4
9.6 0.5 0.7
0.5
6.73
6.47 4.0 2.95
2.55
1 Epoxy meets UL94 V0 at 1/8". Net mass: 1.1 g
For soldering guidelines and SMD footprint design, please refer to Data Handbook SC18.
May 2001 5 Rev 1.300
DATA SHEET STATUS
DATA SHEET PRODUCT DE
STATUS‘ STATUS2
Objective data Development This
prod o
chah
Preliminary data Quaiilication This d
Suppl
Semic ithout
notice ible
produ
Product data Production This d lips
Semic in
order s will
be com
Chang
Limiting values
Limiting values are given in accordance w one
or more of the limiting values may cause p d
operation oi the device at these or at any 0 of
this specification is not implied. Exposure
Application information
Where application ihlormation is given, it is
6: Philips Electronics N.V. 2001
All rights are reserved. Reproduction in w
copyright owner.
The information presented in this documen e
accurate and reliable and may be changed ny
consequence of its use. Publication there
industrial or intellectual property rights.
Philips Semiconductors Product specification
Logic level TOPFET BUK138-50DL
D-PAK version of BUK117-50DL
DEFINITIONS
DATA SHEET STATUS
DATA SHEET PRODUCT DEFINITIONS
STATUS1STATUS2
Objective data Development This data sheet contains data from the objective specification for
product development. Philips Semiconductors reserves the right to
change the specification in any manner without notice
Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in ordere to improve the design and supply the best possible
product
Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in
order to improve the design, manufacturing and supply. Changes will
be communicated according to the Customer Product/Process
Change Notification (CPCN) procedure SNW-SQ-650A
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 2001
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
1 Please consult the most recently issued datasheet before initiating or completing a design.
2 The product status of the device(s) described in this datasheet may have changed since this datasheet was published. The latest information is
available on the Internet at URL http://www.semiconductors.philips.com.
May 2001 6 Rev 1.300
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