CDCDB400 DB800ZL-Compliant 4-Output Clock Buffer for PCIe® Gen 1 to Gen 5
Texas Instruments' low-additive-jitter, low propagation delay clock buffer is designed to meet strict performance requirements
 Texas Instruments’ CDCDB400 is a four-output LP-HCSL, DB800ZL-compliant clock buffer featuring low additive jitter and low propagation delay. The buffer is designed to meet the strict performance requirements for PCIe Gen 1 to Gen 6, QuickPath interconnect (QPI), UPI, SAS, and SATA interfaces in CC, SRNS, or SRIS architectures. The CDCDB400 allows buffering and the replication of a single clock source with up to four individual outputs in the LP-HCSL format. The device also includes status and control registers that are accessible by an SMBus Version 2.0-compliant interface.
Texas Instruments’ CDCDB400 is a four-output LP-HCSL, DB800ZL-compliant clock buffer featuring low additive jitter and low propagation delay. The buffer is designed to meet the strict performance requirements for PCIe Gen 1 to Gen 6, QuickPath interconnect (QPI), UPI, SAS, and SATA interfaces in CC, SRNS, or SRIS architectures. The CDCDB400 allows buffering and the replication of a single clock source with up to four individual outputs in the LP-HCSL format. The device also includes status and control registers that are accessible by an SMBus Version 2.0-compliant interface.
The clock buffer integrates external passive components to reduce overall system costs. The CDCDB400 meets or exceeds the system parameters in the DB800ZL and the DB2000Q specifications. The device is available in a 5 mm x 5 mm, 32-pin VQFN package.
- Four LP-HCSL outputs with programmable integrated 85 Ω (default) or 100 Ω differential output terminations
- Four hardware output enable (OE#) controls
- Additive phase jitter:
    - After a PCIe Gen 6 filter: 20 fs, RMS (max.)
- After a PCIe Gen 5 filter: 25 fs, RMS (max.)
- After a DB2000Q filter: 38 fs, RMS (max.)
 
- Supports common clock (CC) and individual reference (IR) architectures:
    - Spread-spectrum compatible
 
- Output-to-output skew: <50 ps
- Input-to-output delay: <3 ns
- Failsafe input
- Programmable output slew rate control
- Three selectable SMBus addresses
- 3.3 V core and IO supply voltages
- Hardware-controlled low power mode (PD#)
- Current consumption: 46 mA (max.)
- Package: 5 mm x 5 mm 32-pin VQFN
- Microservers and tower servers
- Storage area networks and host bus adapter cards
- Network-attached storage
- Hardware accelerators
- Rack servers
- Communications switches
- Computers on modules
- CT and PET scanners
- Rugged PC laptops
CDCDB400 DB800ZL-Compliant 4-Output Clock Buffers
| Image | Manufacturer Part Number | Description | Available Quantity | Price | View Details | |
|---|---|---|---|---|---|---|
|  |  | CDCDB400RHBR | IC CLK BUFFER 1:4 250MHZ 32VQFN | 402 - Immediate | $12.54 | View Details | 
|  |  | CDCDB400RHBT | IC CLK BUFFER 1:4 250MHZ 32VQFN | 250 - Immediate | $14.74 | View Details | 
 
                 
                 
                 
 
 
 
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