Because of the PWM drive, the neutral point is not a standstill point. The potential of this point is jumping up and down. It generates high common mode voltage and high frequency noise. For example, if the DC bus is 300 V, the neutral voltage can be as high as half the DC voltage, which is way beyond typical common mode voltage range for logic chips. A Voltage divider and low pass filter therefore is needed to reduce the common mode voltage and smooth the high frequency noise. The voltage divider will reduce the signal sensitivity at low speed, especially at start-up where it is needed most, and the low pass filter will induce too much delay for high speed. Consequently, this method tends to have a narrow speed range.